The MC68HCS12 microcontroller contains a CISC processor, not a RISC processor.

- Read more about CISC (Complex Instruction Set Computer)
- Read more about RISC ( Reduced Instruction Set Computer)

**Load/Store/Load Effective Address [2]**

LDAA | Load A | (M) -> A |

LDAB | Load B | (M)-> B |

LDD | Load D | (M : M + 1) -> (A:B) |

LDS | Load SP | (M : M + 1) -> (SP_h:SP_l) |

LDX | Load Index Register X | (M : M + 1) -> X_h:X_l |

LDY | Load Index Register Y | (M : M + 1) -> Y_h:Y_l |

STAA | Store A | (A) -> M |

STAB | Store B | (B) -> M |

STD | Store D | (A) -> M, (B) -> M+1 |

STS | Store SP | (SP_h:SP_l) -> M : M+1 |

STX | Store X | (X_h:X_l) -> M : M+1 |

STY | Store Y | (Y_h:Y_l) -> M : M+1 |

LEAS | Load effective address into SP | Effective Address -> SP |

LEAX | Load effective address into X | Effective Address ->X |

LEAY | Load effective address into Y | Effective Address ->Y |

Ex: X = $1234, Y=$1000, SP=$0A00

Instruction | Result |

LEAX 10,X | X=$1234+$000A = $123E |

LEAX $10,Y | Y=$1000+$0010 = $1010 |

LEAS -10,SP | SP=$0A00-$000A = $09F6 |

**Stack Instructions [2]**

SP is decremented before information is transferred

PSHA | Push A | (SP) – 1 -> SP; (A) -> M_(sp) |

PSHB | Push B | (SP) – 1 -> SP; (B) -> M_(sp) |

PSHC | Push CCR | (SP) – 1 -> SP; (CCR) -> M_(sp) |

PSHD | Push D | (SP) – 2 -> SP; (A : B) -> M_(sp):M_(sp+1) |

PSHX | Push X | (SP) – 2 -> SP; (X) -> M_(sp):M_(sp+1) |

PSHY | Push Y | (SP) – 2 -> SP; (Y) -> M_(sp):M_(sp+1) |

PULA | Pull A | (M_(sp))-> A; (SP) + 1 -> SP |

PULB | Pull B | (M_(sp))-> B; (SP) + 1 -> SP |

PULC | Pull CCR | (M_(sp))-> CCR; (SP) + 1 -> SP |

PULD | Pull D | (M_(sp): M_(sp+1))-> A:B; (SP) + 2 -> SP |

PULX | Pull X | (M_(sp): M_(sp+1))-> X; (SP) + 2 -> SP |

PULY | Pull Y | (M_(sp): M_(sp+1))-> Y; (SP) + 2 -> SP |

**Increment/Decrement [2]**

DEC | Decrement Memory | (M) – $01 -> M |

DECA | Decrement A | (A) – $01 -> A |

DECB | Decrement B | (B) – $01 -> B |

DES | Decrement SP | (SP) – $0001 -> SP |

DEX | Decrement X | (X) – $0001 -> X |

DEY | Decrement Y | (Y) – $0001 -> Y |

INC | Increment Memory | (M) + $01 -> M |

INCA | Increment A | (A) + $01 -> A |

INCB | Increment B | (B) + $01 -> B |

INS | Increment SP | (SP) + $0001 -> SP |

INX | Increment X | (X) + $0001 -> X |

INY | Increment Y | (Y) + $0001 -> Y |

**Addition and Subtraction [2]**

ABA | Add B to A | (A) + (B) -> A |

ADCA | Add with carry to A | (A) + (M) + C -> A |

ADCB | Add with carry to B | (B) + (M) + C -> B |

ADDA | Add without carry to A | (A) + (M) -> A |

ADDB | Add without carry to B | (B) + (M) -> B |

ADDD | Add to D | (A:B) + (M:M+1) -> A:B |

SBA | Subtract B from A | (A) – (B) -> A |

SBCA | Subtract with borrow from A | (A) – (M) – C -> A |

SBCB | Subtract with borrow from B | (B) – (M) – C -> B |

SUBA | Subtract memory from A | (A) – (M) -> A |

SUBB | Subtract memory from B | (B) – (M) -> B |

SUBD | Subtract memory from D (A:B) | (D) – (M:M+1) -> D |

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[1] Fredrick M. Cady, *Software and Hardware Engineering: Assembly and C Programming for the Freescale HCS12 Microcontroller*

[2] Prof. Gilbert Arbez, *University of Ottawa CSI3531 Course Notes*, Module 4